AMSTRAD cpc 6128 Manuel d'utilisateur Page 40

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The Amstrad CPC Firmware Guide
40
Entry
HL holds the address of the three byte far address that is to be used - all the registers apart from IY are
passed to the destination routine unaltered
Exit IY is preserved, and the other registers are as set by the destination routine or are returned unchanged
Notes See FAR CALL above for more details on the three byte far address
&0028 FIRM JUMP (RST 5)
Action Jumps to a routine in either the lower ROM or the central 32K of RAM
Entry No entry conditions - all the registers are passed to the destination routine unchanged
Exit The registers are as set by the routine in the lower ROM or RAM or are returned unaltered
Notes
The RST 5 instruction is followed by a two byte address, which is the address to jump to; before the jump
is made, the lower ROM is enabled, and is disabled when the destination routine is returned from
&0030 USER RESTART (RST 6)
Action This is an RST instruction that may be set aside by the user for any purpose
Entry Defined by the user
Exit Defined by the user
Notes The bytes from &0030 to &0037 are available for the user to put their own code in if they wish
&0038 INTERRUPT ENTRY (RST 7)
Action Deals with normal interrupts
Entry No entry conditions
Exit All registers are preserved
Notes
The RST 7 instruction must not be used by the user; any external interrupts that are generated by
hardware on the expansion port will be dealt with by the EXT INTERRUPT routine (see Low Kernel
Jumpblock)
&003B EXT INTERRUPT
Action This area is set aside for dealing with external interrupts that are generated by any extra hardware
Entry No entry conditions
Exit AF, BC, DE and HL are corrupt, and all other registers are preserved
Notes
If any external hardware is going to generate interrupts, then the user must patch the area from &003B to
&003F so that the computer can deal with the external interrupt; when an external interrupt occurs, the
lower ROM is disabled and the code at &003B is called; the default external interrupt routine at &003B
simply returns, and this will cause the computer to hang because the interrupt will continue to exist
High Kernel Jumpblock
&B900 KL U ROM ENABLE
Action Enables the current upper ROM
Entry No entry conditions
Exit A contains the previous state of the ROM, the flags are corrupt, and all other registers are preserved
Notes
After this routine has been called, all reading from addresses between &C000 and &FFFF refers to the
upper ROM, and not the top 16K of RAM which is usually the screen memory; any writing to these
addresses still affects the RAM as, by its nature, ROM cannot be written to
&B903 KL U ROM DISABLE
Action Disables the upper ROM
Entry No entry conditions
Exit A contains the previous state of the ROM, the flags are corrupt, and all other registers are preserved
Notes
After this routine has been called, all reading from addresses between &C000 and &FFFF refers to the
top 16K of RAM which is usually the screen memory
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